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ZL40800 and ZL40802 6 GHz Fixed Modulus Prescalers / 8 and / 16
Data Sheet Features
* * * * * 3.45V Single Supply Operation Low Power Dissipation: 190mW typ Broadband: DC to 6GHz SSB Phase Noise (-153dBc/Hz @ 10KHz) Pout 3dBm Ordering Information ZL40800/DCA ZL40800/DCB ZL40802/DCA ZL40802/DCB (tubes) 8 pin (tape and reel) 8 pin (tubes) 8 pin (tape and reel) 8 pin -40C to 85C SOIC SOIC SOIC SOIC
January 2003
Prescaler Modulus
* * ZL40800 - Divide by 8 ZL40802 - Divide by 16
Description
The ZL40800 and ZL40802 are Bipolar 3.45V supply, very low power prescalers for professional applications with a fixed modulus of 8 or 16. The ultra low close in (1KHz offset) SSB phase noise performance is ideal for narrow band communications systems or systems with ultra low jitter budgets such as next generation fibre optic communications. The devices are broadband from DC to 6GHz. See Figure 1 and Application Note for RF Prescalers for more details.
Applications
* * * * * * * DC to 6 GHz PLL applications HyperLan LMDS Instrumentation Satellite Communications Fibre Optic Communications; OC48, OC192 Ultra Low Jitter Clock Systems
VCC IN 1 200 Ohm
VCC OUT 8 OUTPUT 7 6 OUTPUT B Vref Div N
400 Ohm INPUT 2 INPUT B 3
*
10mA
GND 4
GND 5
Figure 1 - Block Diagram
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ZL40800 and ZL40802
Data Sheet
Vcc IN INPUT INPUT Bar GND
1 2 3 4
8 7 6 5
Vcc OUT OUTPUT OUTPUT Bar GND
SOIC (N)
Figure 2 - Pin Connections - Top View
Application Configuration
Figure 3 shows a recommended application configuration. This example shows the device set up for single ended operation.
Application Diagram
C1: 1nF Rfilter R1: 400 R2: 400 C2: 10nF
C3: 100pF
1 2 3
8 7 6 5
C5: 10nF
Rsource:
C4: 100pF
4
C6: 10nF
Rload
Note: Dotted Components Optional
Figure 3 - Recommended circuit configuration This represents the circuit used to complete characterisation. The tabulated Electrical performance is guaranteed using this application circuit. A blank application board is available.
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Zarlink Semiconductor Inc.
Data Sheet
Circuit Options
ZL40800 and ZL40802
The application circuit includes some optional components that may be required to improve tolerance of system noise present in the application. Dummy R source may be added to the inverting input to provide a better matched source impedance at the input. This will improve the rejection of common mode noise present within the system. Dummy R load may be added to the inverting output to provide better matched load at the output. This will reduce the radiated EMI at the output and reduce the Output Noise present on the supply rail. R1 and R2 400 Ohm Pull ups are added to increase the headroom present at the amplifier output. This enhances the operation at maximum supply and temperature. An alternative is to provide an inductive choke in place of R1 and R2. These components provide a parallel DC Path to Vcc increasing the bandwidth of the output stage and providing a virtually flat output power across frequency. See Fig 12 and 13. Rfilter can be inserted between the Vcc in and the Vcc_out to provide additional filtering to the input Vcc. The input Vcc powers the input bias reference only and can be a sensitive point to system noise. The nominal input current at Vcc_IN s 0.35mA. An alternative would be to use an inductive choke. C1 is additional Supply Filtering and should be added with Rfilter. The IC includes 10pF of on Chip Supply Filtering.
Input and Output Circuit
Figure 4 shows the equivalent input and output circuit.
*
Vcc_Out
Vcc_In Vref
I/O Circuits
400 Ohm 400 Ohm
*
*
200 Ohm
*
200 Ohm
*
0.5pF 1.0nH 1.0nH
0.5pF
Output
Input
* *
* *
*
*
1.0nH 0.2pF 1.0nH
* * *
0.8pF
* *
10mA
Output Bar
Input bar
Gnd
Gnd
*
*
Figure 4 - Input and Output Equivalent Circuit
Zarlink Semiconductor Inc.
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ZL40800 and ZL40802
Increase Output Power Output Match and Narrow Band Operating Range
Data Sheet
The device has been characterised with a mismatch at the output. This is a broadband configuration. 3dB more output power is available if the application matches the load to the output impedance.
ZL40802 Phase Noise vs Offset Freq Pin = -6dBm, Vcc = 3.6V, Temp = 25C @ 1,3 & 5GHz
Phase Noise in dBC/Hz
-130 -135 -140 -145 -150 -155 -160 100 1000 10000 100000 Offset Frequency in Hz
Figure 5 - ZL40802 Typical Phase Noise
5GHz 3GHz 1GHz
Absolute Maximum Ratings Parameter 1 2 3 4 5 Supply voltage RFin All I/O ports ESD protection Storage temperature -0.5 2k -55 +150 Symbol Vcc Min -0.5 Max 6 12 +0.5 Units V dBm V V Mil-std 883B / 3015 cat1 C
Operating Ranage Parameter 1 2 3 4 5 Supply voltage RFin Frequency Range Operating Junction Temperature Junc'n to Amb't resistance Junc'n to Amb't resistance Rth (j-a) Rth (j-c) Symbol Vcc Min 3.3 0.1 -40 150 60 Max 3.6 6 125 Units V GHz C C/W 4 layer FR4 Board C/W 4 layer FR4 Board
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Zarlink Semiconductor Inc.
Data Sheet AC/DC Electrical Characteristics
Electrical Characteristics Characteristic Icc_in (Supply current) Icc_out (Supply current) Icc_out (Supply current) Input frequency Input sensitivity Input overload Phase Noise Output voltage Output power Output t-rise Output t-fall T - prop delay Jitter Output Duty Cycle Input Edge Speed Pin 1 8 8 2,3 2,3 2,3 6,7 6,7 6,7 6,7 6,7 2,6 6,7 6,7 2,3 45 500 -7 4 29 31 1 -20 10 -150 1 -2 110 110 250 0.1 50 55 2 Min. Typ. 0.35 52 55 86 89 6 -10 Max. Units mA mA mA GHz dBm dBm dBC/Hz Vp-p dBm ps ps ps ps % V/us
ZL40800 and ZL40802
Conditions ZL40800 Div8 & ZL40802 Div16 ZL40800 Div8 ZL40802 Div16 RMS sinewave, fin = 1GHz to 6GHz, Note 1 fin = 1GHz to 6GHz, Note 1 @ 1KHz Offset Fin = 3GHz Differential Into 50ohm pull up resistors fin = 1GHz to 6GHz, Pin = -10dBm Note 2 fin = 1GHz to 6GHz, Pin = -10dBm fin = 1GHz to 6GHz, Pin = -10dBm 50% IN to 50% OUT
fin = 1GHz to 6GHz, In = -10dBm For < 1GHz input operation
These characteristics are guaranteed by design and characterisation over the following range of operating conditions unless otherwise stated: Tamb = -40C to + 85C, Vcc = 3.3V to 3.6V. Note 1: Pin = power measured into 50 ohm Load from 50 Ohm Source. Note 2: Pout Single Ended AC coupled Single 50 Ohm Termination
Zarlink Semiconductor Inc.
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ZL40800 and ZL40802
Typical Input Sensitivity (Sinewave Drive) 15 10 Vin into 50 Ohm (dBm) 5 0 -5 -10 -15 -20 -25 -30 -35 0 1 2 3 4 5 6 7 8 9 Input Frequency (GHz)
Edge Speed >500V/us
Data Sheet
Guaranteed Operating Range -40C to 85C
Figure 6 - Typical Input Sensitivity (sine wave drive)
Single Ended AC Coupled Single Termination ( + 400 Ohm or Choke Pull Up )
Vcc out 400 Ohm 200 Ohm 200 Ohm 400 Ohm
Transmission Line Optional Balance Gnd 50 Ohm 50 Ohm
Pre-scaler Output
Figure 7 - Single Ended AC Coupled Single Termination
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Zarlink Semiconductor Inc.
Data Sheet
ZL40800 and ZL40802
ZL40800 Phase Noise vs Offset Pin = 2dBm, Vcc = 3.6V, Temp = 25C
-130
Phaase Noise in dBC/Hz
-135 -140 -145 -150 -155 -160 100 1000 10000 100000 5GHz 3GHz 1GHz
Offset frequency in Hz
Figure 8 - ZL40800 Typical Phase Noise
ZL40800: Phase Noise vs Input Frequency @ 2.5dBm Pin, 3.6V Supply, 25C -120 -125 -130 -135 -140 -145 -150 -155 -160 0 1 2 3 4 5 6 Input Frequency (GHz)
Phase Noise (dBc/Hz)
100 Hz 1 KHz 10 KHz 100 KHz
Figure 9 - ZL40800 Phase Noise vs Input Frequency
Zarlink Semiconductor Inc.
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ZL40800 and ZL40802
Data Sheet
ZL40800: Phase Noise v Pin, 3.6V Supply, Fin = 3GHz, T = 25C
Phase Noise (dBc/Hz) -120 -130 -140 -150 -160 -10 -5 Pin (dBm)
Figure 10 - ZL40800 Phase Noise vs Input Power
100 Hz 1 KHz 10 KHz 100 KHz
0
5
ZL40800: Phase Noise v Vcc Fin = 3GHz, Pin = -6dBm, T =25C
Phase Noise (dBc/Hz) -120 -130 -140 -150 -160 3.2 3.3 3.4 3.5 3.6 3.7 Supply Voltage (V)
Figure 11 - ZL40800 Phase Noise vs Vcc
100 Hz 1 KHz 10 KHz 100 KHz
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Zarlink Semiconductor Inc.
Data Sheet Single Ended or Differential Load
ZL40800 and ZL40802
Figure 12 and Figure 13 illustrate the output waveform when measured differential and single ended with a 6GHz waveform at the input at a level of +2dBm. The single ended output contains some input frequency breakthrough which contributes to the distortion present. This is a common mode signal which is rejected if the output is taken differentially. Differential operation also provides an additional 3dB. Differential Operation reduces the radiated EMI in the system and reduces the susceptibility to common mode system noise.
ZL40800_Dev1 (/8) with 400R pull-ups Frequency_sweep, Vcc = 3.6v Device 1,Temperature = 25C 1 0 o/p level (dBm) -1 -2 -3 -4 -5 -6 0 1E+09 2E+09 3E+09 4E+09 5E+09 6E+09 7E+09 8E+09 i/p frequency (Hz) Device 1,Temperature = 85C
Figure 12 - ZL40800 Pout / Input Frequency
ZL40802_dev1_Frequency_sweep, Vcc = 3.3v Device 1,Temperature = -40C Device 1,Temperature = 85C 0 -1 -2 o/p level (dBm) -3 -4 -5 -6 -7 -8 1000000000 i/p frequency (Hz) 10000000000 Device 1,Temperature = 25C
Figure 13 - ZL40800Pout v Input Frequency (Vcc=3.3V, T= -40C,25C, 85C)
Zarlink Semiconductor Inc. 9
ZL40800 and ZL40802
Data Sheet
Figure 14 - ZL40800 Single Ended Out @ 5Ghz +2dBm
Figure 15 - ZL40800 Differential Out @ 5Ghz +2dBm
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Zarlink Semiconductor Inc.
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